The performance of Intel’s next round of processors could be boosted by as much as 20 per cent by the use of a new method for making transistors on semiconductors, said the chief architect of the new technology on Thursday.
Designing and manufacturing of its own chips is done by the Santa Clara, California-based company and it is one of the few remaining such companies in the world to do both. But after Intel said last month that the next generation ships being developed by it, called its 7-nanonmeter process node, would get delayed, there have been some concerns among investors about the company’s manufacturing operations.
According to analysts, this delay in bringing the next generation chips to the market could further cement the lead that has been gained over Intel by its rivals including the Taiwan Semiconductor Manufacturing Co in the area of making smaller and more power efficient chips.
Since the delays were disclosed, a fall of almost 20 per cent in the price of the company’s chips has been noted.
By disclosing improvements on its existing 10-nanonmeter process node this Thursday, Intel sought to buck the notion that the single-number names given to each generation of chip process node tell the entire story. The chip maker disclosed a new method to make what it now calls “SuperFin” transistors. And this together with a new material that is being used to enhance the capacitors on chips will potentially increase the performance of Intel’s forthcoming processors even though they are still being made on 10-nanonmeter manufacturing lines.
“It is 20%, the largest intra-node jump ever in our history,” Raja Koduri, Intel’s chief architect, said of the performance gain in an interview with Reuters. “It’s actually same as what you would get with one full Moore’s Law node of performance.”
But until Intel’s new chips come out, it would not be possible to test those claims in the real world conditions. But the chips will be used in Intel’s “Tiger Lake” laptop chips slated for release this fall.
The chip design process of Intel, even with the new transistor technology, has been re-worked so that the company will be able to use either its own chip factories or outside chip factories more easily according to whichever option of manufacturing that would be required to manufacture the best performing chips, Koduri said.
“Whatever gets us to deliver those products on time, with leadership performance, we have the flexibility and are going to utilize that,” he said.
(Source:www.financialpost.com)
Designing and manufacturing of its own chips is done by the Santa Clara, California-based company and it is one of the few remaining such companies in the world to do both. But after Intel said last month that the next generation ships being developed by it, called its 7-nanonmeter process node, would get delayed, there have been some concerns among investors about the company’s manufacturing operations.
According to analysts, this delay in bringing the next generation chips to the market could further cement the lead that has been gained over Intel by its rivals including the Taiwan Semiconductor Manufacturing Co in the area of making smaller and more power efficient chips.
Since the delays were disclosed, a fall of almost 20 per cent in the price of the company’s chips has been noted.
By disclosing improvements on its existing 10-nanonmeter process node this Thursday, Intel sought to buck the notion that the single-number names given to each generation of chip process node tell the entire story. The chip maker disclosed a new method to make what it now calls “SuperFin” transistors. And this together with a new material that is being used to enhance the capacitors on chips will potentially increase the performance of Intel’s forthcoming processors even though they are still being made on 10-nanonmeter manufacturing lines.
“It is 20%, the largest intra-node jump ever in our history,” Raja Koduri, Intel’s chief architect, said of the performance gain in an interview with Reuters. “It’s actually same as what you would get with one full Moore’s Law node of performance.”
But until Intel’s new chips come out, it would not be possible to test those claims in the real world conditions. But the chips will be used in Intel’s “Tiger Lake” laptop chips slated for release this fall.
The chip design process of Intel, even with the new transistor technology, has been re-worked so that the company will be able to use either its own chip factories or outside chip factories more easily according to whichever option of manufacturing that would be required to manufacture the best performing chips, Koduri said.
“Whatever gets us to deliver those products on time, with leadership performance, we have the flexibility and are going to utilize that,” he said.
(Source:www.financialpost.com)
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